发明名称 |
Semiconductor memory device |
摘要 |
This invention discloses an EEPROM which increases an erasing voltage Vpp to be applied during a data write cycle by increasing an avalanche breakdown voltage between a source region and a semiconductor substrate in the memory cell transistor in order to improve the erasing efficiency, and employs a structure which strengthens the electric field at the edge of a drain region in order to let hot carriers be easily generated and to thereby improve writing efficiency.
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申请公布号 |
US5189497(A) |
申请公布日期 |
1993.02.23 |
申请号 |
US19910765065 |
申请日期 |
1991.09.24 |
申请人 |
HITACHI, LTD. |
发明人 |
KOMORI, KAZUHIRO;MEGURO, SATOSHI;HAGIWARA, TAKAAKI;KUME, HITOSHI;TSUKADA, TOSHIHISA;YAMAMOTO, HIDEAKI |
分类号 |
H01L27/06;H01L27/105;H01L29/788 |
主分类号 |
H01L27/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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