发明名称 |
Selective electro-deposition and circuit patterning technique |
摘要 |
A process for selectively electrodepositing a pattern of metal such as copper on a substrate comprises the deposition of two successive layers over the entire substrate, photolithographic patterning of the upper layer, and placement of the exposed part of the first deposited layer to a lower surface potential then the patterned second layer. The metal is then deposited under a periodical modulated voltage signal that is adjusted in reference to the reduction potential of the metal so that any metal deposited on the exposed part of the first layer during the positive duty cycle of the signal is removed during the negative duty cycle while little or none of the metal deposited on the second layer is removed due to the second layer higher surface potential. The remaining exposed part of the first layer is etched away after the electrodeposition process is terminated.
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申请公布号 |
US5188723(A) |
申请公布日期 |
1993.02.23 |
申请号 |
US19920867345 |
申请日期 |
1992.04.13 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
YU, CHRIS C.;SANDHU, GURTEJ S.;GILTON, TERRY |
分类号 |
H01L21/288;H05K3/06;H05K3/10;H05K3/24 |
主分类号 |
H01L21/288 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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