发明名称 DIGITAL SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To obtain a digital signal processing circuit which reduces its current consumption and is suited to a high degree of integration by reducing the capac ity of the storage means like a ROM, etc. CONSTITUTION:The circuit is provided with a 1st code control means 2 outputting the code of an input signal after forwarding or inverting it, and a zero detector means 5 detecting zero of the input signal. Thus, the input code bit of a storage means 7 is deleted. The means 7 outputs the value of product obtained from the input signal and a set coefficient. Then, a 2nd code control means 9 corrects the code of an output signal 8 of the means 7 in accordance with a code bit 4 of the input signal against a case where the input signal is equal to zero with a selector means 11.
申请公布号 JPH0540607(A) 申请公布日期 1993.02.19
申请号 JP19910196746 申请日期 1991.08.06
申请人 SEIKO EPSON CORP 发明人 NAKAJIMA KATSUTO
分类号 G06F7/52;G06F7/523 主分类号 G06F7/52
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