发明名称 Combined and simplified multiplexing and dithered analog to digital converter
摘要 A circuit for analog-to-digital conversion is disclosed comprising multiplexed ADCs. Dithering is introduced into the circuit before conversion and subtracted out of the resulting digital output stream. Gain control feedback loops are employed to eliminate non-unity gain error of the dither signal and multiplexed ADC differential gain errors. Correlation between the digital output stream and the dither signal is used to detect a non-unity condition and derive gain control feedback. Correlation with the dither signal is also used to detect gain differences between multiplexed ADCs and generate corrective feedback.
申请公布号 US5187481(A) 申请公布日期 1993.02.16
申请号 US19920817710 申请日期 1992.01.07
申请人 HEWLETT-PACKARD COMPANY 发明人 HILLER, DONALD R.
分类号 H03M1/04;G06F17/15;H03H21/00;H03M1/06;H03M1/10;H03M1/12;H03M1/14;H03M1/20 主分类号 H03M1/04
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