| 摘要 |
PURPOSE:To increase memory capacity and realize high speed operation of DRAM by easing a design rule for word line of word shunt region and backing wiring. CONSTITUTION:In DRAM 1, a memory cell array is divided into a plurality of regions 11, a backing wiring SL of a low resistance is formed along a word line WL and a word shunt region 13 is formed between the memory array regions. The word line and backing wiring are cut only in such a number corresponding to the predetermined ratio for all wirings at both ends of the word shunt region and the disconnected word lines WL3, WL4 and backing wirings SL3, SL4 are connected with the wiring layers ML3, ML4 having a resistance lower than that of the word line. The wiring layer connecting the disconnected word lines and backing wirings is formed as a first aluminum wiring layer formed in the same process as the wiring layer forming the bit line of DRAM. |
