发明名称 ARITHMETIC UNIT
摘要 PURPOSE:To provide the arithmetic unit capable of high-speed processing taking out the arbitrary number of bits at an arbitrary position from numeric data stored in a memory circuit and storing it to an arbitrary position of numeric data of a register. CONSTITUTION:The numeric data of a memory circuit 2 is set to a shift circuit 3, the number of bits to be shifted is set to a register c4, the result of shift operation in the shift circuit 3 is set to an arithmetic unit ALU5, the numeric data to take out the required bit is set to the memory circuit 2 or to the ALU5 from a register 6, and the AND operation result in the ALU5 is set to an OR circuit 8. Further, the numeric data is set to the OR circuit 8 from the register 6, and the OR operation result is stored in the register 6. Thus, the processing taking out the arbitrary number of bits at an arbitrary position from the numeric data stored in the memory circuit 2 and storing it in an arbitrary position of the numeric data of the register 6 can be performed by one step.
申请公布号 JPH0535468(A) 申请公布日期 1993.02.12
申请号 JP19910191807 申请日期 1991.07.31
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HIRAMATSU KATSUHIKO;FUJIMOTO YUKIHIRO
分类号 G06F7/00;G06F9/30 主分类号 G06F7/00
代理机构 代理人
主权项
地址