| 摘要 |
A cell controller (1) comprises a plurality of processors (10), each of which has a number of interprocessor communication links (15). One or more of the processors (10) have interfaces (11) for connecting the processors (10) selectable data channels (13,14). A patch facility (4) enables any selected combination of interprocessor communication links (15) of the different processors (10) to be interconnected to form a multiprocessor network. <IMAGE> |
