发明名称 Semiconductor memory device cotg. reading control circuit - prohibiting reading of one or more bits from multibit data emitted form several memory cells
摘要 A memory cell field stores data units in an n-bit-format, where n is a whole number, that specifies the bit length of each stored data unit. A device is provided for reading an n-bit unit from stored data in addressed cells within the memory cell field. An access control device, in reaction to a signal determining at least one bit selectively, forbids the issue of at least one bit from the data read from the memory cell field. The memory cell field (1) has cells (MC) for storage of 1-bit data. The semiconductor memory device allows reading of data with a unit out of several bits. An installation (4) is provided for receiving an external address signal and a further installation (5) receives an external line address scanning signal (bar RAS). Another device receives (6) an external column address scanning signal (bar CAS). ADVANTAGE - Multi-bit configuration, with which reading of desired bit can be selectively prevented.
申请公布号 DE4226073(A1) 申请公布日期 1993.02.11
申请号 DE19924226073 申请日期 1992.08.06
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 MIYAMOTO, TAKAYUKI, ITAMI, HYOGO, JP
分类号 G06F12/06;G11C7/10;G11C11/401;G11C11/409 主分类号 G06F12/06
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