| 摘要 |
<p>PURPOSE:To allow the circuit to receive a clock signal with an optional duty ratio, to convert the signal into a clock signal with a prescribed duty ratio at all times and to output the result. CONSTITUTION:A D flip-flop(D-FF) 2 divides a frequency of an input clock signal whose period is T into two to obtain a Q output (b) and an inverse of Q output whose period is 2T. The inverse of Q output (c) passes through a delay line 3 and results in being delayed by a delay time tau from the Q output (b) to be a delayed inverse of Q output (d). The Q output (b) and the delayed inverse of Q output (d) are given to an EX-NOR 4, in which the outputs are EX-NORed, and then a clock signal (e) with a duty ratio whose period is T and whose pulse width H is equal to the delay time tau is obtained.</p> |
