发明名称 POWER FAILURE COMPENSATING STRUCTURE FOR MICROCOMPUTER EQUIPMENT
摘要 <p>PURPOSE:To prevent a control instruction from being performed at a wrong time in the case the power failure occurs within the power failure compensation time by stopping a high frequency oscillation part with a power failure signal and simultaneously supplying a system clock signal from a low frequency oscillation part. CONSTITUTION:When a supply of voltage V1 from an external power source is stopped, lithium battery E in place of a voltage regulator F maintaines the output voltage V2 of regulated power supply circuit B. But a low signal is inputted in the input port A7 of a microcomputer board A by a voltage detection element G. An arithmetic processing part M recognizes that an external power source is interrupted via the input port A7, switches so that the common terminal of a signal switching part P is connected to the side of time clock terminal A5, turns a crystal oscillator K1 off, executes an arithmetic processing by 32kHz clock signal of a crystal oscillator K2 and a timer processing part N executes the arithmetic processing by the 32kHz clock signal of the crystal oscillator K2. Therefore, the clock of a microcomputer equipment for timer control itself does not stop and current consumption is reduced.</p>
申请公布号 JPH0527864(A) 申请公布日期 1993.02.05
申请号 JP19910182757 申请日期 1991.07.24
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 MORITA KAZUNARI
分类号 G06F1/04 主分类号 G06F1/04
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