| 摘要 |
<p>PURPOSE:To attain the high speed of reading by simultaneously balancing the potential of the bit line/dummy cell side bit line of a nonvolatile semiconductor memory, and the potential of the sense line/dummy cell side sense line. CONSTITUTION:The nonvolatile semiconductor memory is equipped with a reading circuit of a two stage sense system using a level shift circuit and a single end type sense amplifier. Then, the relation of each size of a transistor 4 for a bit line charge, transistor 5 for a bit line transfer gate, transistor 7 for a bit line load, at a main body cell side, and transistor 14 for the bit line charge, transistor 15 for the bit line transfer gate, and transistor 17 for the bit line load, at the dummy cell side, is set so as to simultaneously fulfill the balancing condition of both the bit line/dummy cell side bit line, and the sense line/dummy cell side sense line.</p> |
