ROM CIRCUIT

摘要

The ROM circuit for simplifying the ciruit construction of the AND circuit portion (3) to reduce the required area generates N bit of data programed at the respective cross section of output lines (D0- D2) and word lines (W0-W3) by decoding M bit of address signals. The ROM circuit comprises a decoder (10), a gate unit (22), a memory cell array (24) and a precharger (26). The decoder generates a word signal from an input address signal. The gate unit supplies a word signal to a corresponding word line according to a clock signal. The memory cell array stores the desired data according to the combinational existance of MOS transistors at the respective cross section of the word lines and the output lines. The respective output lines are precharged according to the clock signal.