| 摘要 |
<p>PURPOSE:To use one reference clock, to make the circuit scale constant even when number of clocks to be switched, to confirm whether or not the clock is normally oscillated and to adjust the clock even when the oscillated clock is not normal. CONSTITUTION:(1); A CPU 9 uses a switch signal 106 and a switch 11 to interrupt a loop from a phase comparator 3 to a comparison frequency divider. The CPU 9 controls a VCO 5 through a D/A converter 7 to obtain a center frequency 103 (set to k) from an output pulse 105. When the center frequency is not correct, the value (k) is revised and the processing above is repeated. When the (k) is no longer revised, it indicates the defective circuit. The CPU 9 closes the loop finally. (2); Feedback is applied in the closed loop state, the CPU 9 gives the reference frequency division value 101, the comparison frequency division value 102 and the center frequency (k) obtained in (1) to the circuits, to confirm whether or not the circuit is normal by awaiting a phase lock signal 104 going to ''1'' within a prescribed time. (3); The processing (1), (2) are implemented to all clocks to be switched. When they are all normal, the adjustment is made complete.</p> |
