发明名称 Binary accumulator with overflow protection - comprises addition mechanism, memory unit, detector and set unit suitable for processor or digital filter
摘要 The addition mechanism is connected to the memory unit, with which an input word is added to a stored word. The detector checks whether the values of the stored word lie within a predetermined value range and, where the value of the stored word are outside the predetermined value range, it generates a set signal. The detector (DE) only checks extreme values of the stored word, and where values are present outside the predetermined value range a part of the stored word is set via the set device (SR), whereby the wt. of the set part is greater than that of the largest possible input word. The detector is directly connected to the signal output of the memory unit (SE) and the set device is connected to a signal input or a set input of the memory. USE/ADVANTAGE - Digital signal processor accumulator working at higher speed.
申请公布号 DE4125120(A1) 申请公布日期 1993.02.04
申请号 DE19914125120 申请日期 1991.07.30
申请人 STANDARD ELEKTRIK LORENZ AG, 7000 STUTTGART, DE 发明人 HANS, ANTON, DIPL.-ING., 7535 KOENIGSBACH-STEIN, DE
分类号 G06F7/50;G06F7/509 主分类号 G06F7/50
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