发明名称 Circuit arrangement for converting a voltage drop tapped from a test object from a predetermined input voltage range to a desired output voltage range.
摘要 <p>A circuit arrangement for converting a voltage drop ( DELTA U) tapped from a test object (16) from a predetermined input voltage range to a desired output voltage range includes a current mirror circuit fed by a constant current source (14) and comprising an input transistor (T1) and an output transistor (T2). The constant current source (14) lies in the collector line of the input transistor (T1) whilst in the collector line of the output transistor (T2) at least one diode (D1) lies which is traversed by a current having a value which is equal to the value of the current furnished by the constant current source (14). Lying in parallel with the series circuit of the output transistor (T2) and the diode (D1) is an identically configured circuit branch having a further transistor (T3) and at least one diode (D2) lying in the collector line thereof. The test object (16) lies in the emitter line of the further transistor (T3); the test object (16) is traversed by a test current from a further constant current source (20). Two output lines (22, 26) are provided with which the preceding voltage drop can be tapped from the collector of the output transistor (T2) and the collector of the further transistor (T3).</p>
申请公布号 EP0525421(A2) 申请公布日期 1993.02.03
申请号 EP19920111130 申请日期 1992.07.01
申请人 TEXAS INSTRUMENTS DEUTSCHLAND GMBH 发明人 GOETZ, LASZLO
分类号 G01R19/00;G01R31/327;H03F3/343;H03F3/347 主分类号 G01R19/00
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