发明名称 |
CORRELATION COMPUTING DEVICE |
摘要 |
<p>In a correlation computing device including circuits for segmenting (1, 2, 3) a digital input signal into two kinds of digital signals according to a predetermined rule, arithmetically processing (4, 6) the two digital signals for each of the segments, and cumulatively adding (7) the results of signal processing for each of the segments, a high-order bit elimination circuit (9) is provided for eliminating high-order bits of the digital input signal prior to the signal processing.</p> |
申请公布号 |
EP0387849(A3) |
申请公布日期 |
1993.02.03 |
申请号 |
EP19900104837 |
申请日期 |
1990.03.14 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
UOMORI, KENYA;ISHII, HIROFUMI;MORIMURA, ATSUSHI |
分类号 |
H04N19/50;G06F17/15;G06T7/00;G06T7/20;H04N19/423;H04N19/426;H04N19/51;H04N19/527;H04N19/537;H04N19/547;H04N19/80;H04N19/85;(IPC1-7):G06F15/336;G06F15/70 |
主分类号 |
H04N19/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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