| 摘要 |
Low power oscillator circuits for providing clock signals. The circuits comprise crystal oscillators for providing an input wave form of a specified frequency to the clock circuit, square wave generators having at least two input terminals wherein one of the two input terminals is coupled to the oscillator, and a power output network coupled to the square wave generator for outputting a substantially square wave having substantially the same frequency as the input wave form, the power output network being biased at a high voltage level. Clock circuits described herein provide the advantage of low power oscillation with little power dissipation.
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