发明名称
摘要 PURPOSE:To attain circuit integration by connecting each common emitter of the 2nd and 3rd differential pair transistors (TR) to each collector of the 1st differential air TR and giving a control signal to bases of the 2nd and 3rd differential pairs and each current source of a current mirror pair coupling to the collectors so as to eliminate the change in the DC level of output terminal. CONSTITUTION:A synthesized current of collector currents of TRs Q4, Q5 is divided equally into two by a current mirror pair circuit comprising TRs Q7, Q8 and Q9, the divided current is flowed by load resistors RL1 and RL2 so as to eliminate the change in the DC level of output terminals 6, 7 a signal control voltage. The characteristics of TRs Q7, Q8 of the current mirror pair circuit is identical entirely, a current IT is the sum of the collector current of the TRQ8 and the base current of the TRQ9 and the sum of emitter currents of the TRs Q7, Q8 is the resulting current (ICQ4ICQ5) of the collector currents of the TRs Q4, Q5. Further, only an AC signal component receives a change by a voltage VCONT impressed to a control signal input terminal 5 and the DC level at output terminals 6 and 7 is unchanged.
申请公布号 JPH058603(B2) 申请公布日期 1993.02.02
申请号 JP19840085413 申请日期 1984.04.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NANBAE MITSUO
分类号 H03G3/10 主分类号 H03G3/10
代理机构 代理人
主权项
地址