发明名称 |
Method of fabricating semiconductor device by forming doped regions that limit width of the base |
摘要 |
A first semiconductor region is of a first conduction type and forms a transistor collector. A second semiconductor region is of a second conduction type and forms a transistor base. The second semiconductor region extends in the first semiconductor region. A third semiconductor region is of the first conduction type and forms a transistor emitter. The third semiconductor region extends in the second semiconductor region. A fourth semiconductor region is of the first conduction type and has a first portion and a second portion. The first portion extends in a part of the first semiconductor region below an edge of the third semiconductor region, and the second portion extends from the first semiconductor region into a part of the second semiconductor region outward of the edge of the third semiconductor region to limit a width of the transistor base.
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申请公布号 |
US5183768(A) |
申请公布日期 |
1993.02.02 |
申请号 |
US19910729965 |
申请日期 |
1991.07.15 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
KAMEYAMA, SHUICHI;SHIMOMURA, HIROSHI;KIKUCHI, KAZUYA |
分类号 |
H01L21/265;H01L21/331;H01L21/74;H01L29/08 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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