| 摘要 |
PURPOSE:To improve the reliability of a self-diagnosis system for a cache tag RAM performing the self-diagnosis with use of a cache tag RAM which is not contained in a cache controller and the hardware. CONSTITUTION:A detection means 20 detects the access start signal outputted from a microprocessor 30 when a power supply of a system is applied or a reset switch is pushed. An inhibition means 10 detects the access start signal outputted from a microprocessor 30 and then controls the address line of the microprocessor 30 at a high impedance in order to set the microprocessor 30 in a halt state with a BOFF signal. Then a cache RAM controller 40 diagnoses a cache tag RAM 80 by hardware while the microprocessor 30 is kept isolated by a generation means 50. At the same time, an error detection means 60 detects the presence or absence of an error. Then an information means 70 informs the microprocessor 30 of the error information. |
