发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To provide a semiconductor memory in which coupling noise between bit lines is suppressed effectively. CONSTITUTION:The semiconductor memory comprises transistors Q41, Q42 for precharging a bit line with a voltage Vcc, transistors Q31-Q34 for precharging the bit line with a voltage Vss or fixing the potential of the bit line, and a bit line selected by an address. The semiconductor memory further comprises short circuit transistors Q11, Q12 for short-circuiting the bit lines precharged, respectively, with voltages Vcc and Vss to set a voltage of (Vcc + Vss)/2 and precharge transistors Q21, Q22 for finely regulating the precharge potential of selected bit line wherein the potential of non-selected bit lines sandwiching the selected bit line is fixed through control of the transistors Q31-Q34 during data read-out operation.
申请公布号 JPH0520884(A) 申请公布日期 1993.01.29
申请号 JP19910172261 申请日期 1991.07.12
申请人 TOSHIBA CORP 发明人 NAKAMURA HIROSHI;SAKUI YASUSHI;MOMOTOMI MASAKI;MASUOKA FUJIO
分类号 G11C17/00;G11C11/401;G11C11/409;G11C16/06;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C17/00
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