发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To increase a signal level and maintain sufficient noise resistance even when an accumulated capacity is decreased by reduction in a stacked capacitor area by increasing a differential potential between an upper electrode and a lower electrode of a stacked capacitor of a memory cell during data writing. CONSTITUTION:The potential of an upper electrode 11 for a row of stacked capacitors to which a stacked capacitor of a memory cell belongs, is set as -Vcc for example. Write voltage, say, Vcc is applied to a bit line BL. I this case, the differential potential between the upper electrode 11 and the lower electrode 9 during write time is 2Vcc. More specifically, the potential of the upper electrode 11 of the stacked capacitor of a memory cell to write during data writing is lowered to a minus(-) side, which increased the differential voltage between the upper electrode 11 and the lower electrode 9. This construction makes it possible to increase a write signal level and obtain favorable noise resistance even when the accumulated capacity is decreased by the reduction in a stacked capacity area.
申请公布号 JPH0521742(A) 申请公布日期 1993.01.29
申请号 JP19910198714 申请日期 1991.07.12
申请人 SONY CORP 发明人 NAKAJIMA HIDEHARU
分类号 H01L27/10;G11C11/404;H01L21/8242;H01L27/108 主分类号 H01L27/10
代理机构 代理人
主权项
地址