| 摘要 |
PURPOSE: To provide a circuit which precisely reproduce a synchronizing signal from an input video signal and which especially suppresses jitter to a minimum. CONSTITUTION: A phase locked loop 10 reproduces a synchronizing signal. A first counter 36 counts a fixed time period which can be adjusted. A flip flop 38 generates a synchronous pulse having a period decided by a series of fixed time periods which can be adjusted. A second counter 12 continuously measures a phase difference between the synchronous pulse and an input pulse related to the synchronous component of the video signal. The period correction value of the next time period which can be adjusted is decided by measuring the respective phase differences. A circuit forming a loop filter contains accumulation circuits 16, 18 and 20, a first scaling circuit 22, an adder 24 and a second scaling circuit 26 calculating the weighted phase difference deciding the period correction value. |
