发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
PURPOSE:To reduce the wiring capacity of a sub-output line and increase the speed of data read out from a semiconductor device. CONSTITUTION:A pair of main output lines 3 are connected with a pair of sub-output lines 2 substantially at the middle position of the sub-output lines 2. Therefore, this construction makes it possible to reduce the wiring capacity of the sub-output lines 2 which ranges from a memory cell array 1 to the main output lines 3 and hence highly speed up the reading out of data. |
申请公布号 |
JPH0521753(A) |
申请公布日期 |
1993.01.29 |
申请号 |
JP19910168186 |
申请日期 |
1991.07.09 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
TANAKA YOSHINORI;SAKURAI MIKIO |
分类号 |
H01L27/10;G11C11/401;G11C11/409;H01L21/8242;H01L27/108 |
主分类号 |
H01L27/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|