发明名称 Arithmetic circuit for addition, subtraction, multiplication and division - has potential memory flip=flops of main controller arranged as single unit
摘要 The arithmetic circuit comprises a main circuit and an auxiliary shift rgister with a main controller and combined decimal point and shift register controller. A number input circuit and a quotient shift register are also provided. A multiplier shift register may be incorporated in the number input circuit. The flip-flops of the main controller are arranged as a single unit. Switches are provided which trip the flip-flops into one of two settings.
申请公布号 DE4116532(A1) 申请公布日期 1993.01.28
申请号 DE19914116532 申请日期 1991.05.21
申请人 MERKLE, PAUL, 7032 SINDELFINGEN, DE 发明人 MERKLE, PAUL, 7032 SINDELFINGEN, DE
分类号 G06F7/491;G06F7/52 主分类号 G06F7/491
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