发明名称
摘要 PURPOSE:To produce a bit clock pulse which is needed for demodulation despite a big change of the level inverting interval by setting the count value obtained with the maximum level inverting interval of the normal revolution of a disk at an integer multiple as much as a normal bit clock pulse. CONSTITUTION:When the revolving number of a disk is set double as mucn as a normal case, the maximum level inverting interval Tmax2 of a reproduced signal S (figure A) is set at 1/2 normal length. Therefore master clock pulses Pm (figure B) are counted, all 11 pulses Pf sent from a 1/22-dividing part 19 are put into the interval Tmax2 as shown by a figure C. Then the final count value is set at ''11'' with the interval Tmax2 of a 6-bit counter 10. As a result, the maximum count value of a latch part 12 is set at ''11''. An output pulse Ph is generated by a counter 13 every time 11 Pm pulses are counted after an edge pulse Pe is supplied to a load terminal L as shown in the figure D. Thus the frequency of the pulse Ph becomes twice as much as the pulse Pf, and 22 pulses Ph are fed in a period of the interval Tmax2. These pulses are 1/2 divided by a frequency divider 14.
申请公布号 JPH056754(B2) 申请公布日期 1993.01.27
申请号 JP19830013067 申请日期 1983.01.29
申请人 SONY CORP 发明人 MYAOKA CHISATO;WACHI SHIGEAKI
分类号 G11B20/14;G11B20/10 主分类号 G11B20/14
代理机构 代理人
主权项
地址