| 摘要 |
PURPOSE:To reduce the dependency of a code pattern and to reduce the jitters by delaying the code pattern of an input signal by a few time slots and by inputting it to an OR circuit. CONSTITUTION:Input received pulses are equalized by equalizer 1 and then converted by monostable multivibrator 6 into an RZ signal of 50% in duty. Delay lines 71-7i delay respective input code patterns by one-(i) time slots, so that the output of OR circuit 5 will have more ''1'' components than that of monostable multivibrator 6. Therefore, as the number of delay lines is increased by two-three, the mark rate approximates one and the change of input code patterns is compressed considerably, so that the jitters can be suppressed. In addition, using this circuit increases timing components, so that the circuit constitution will be simplified. |
