| 摘要 |
Source and drain electrodes which are overlapped and elevated with respect to an inverse-T gate electrode provide low lateral electric field, low source-drain series resistance, and uniform source and drain doping profiles while maintaining a compact layout. In one form of the invention, a semiconductor device (10) has source and drain electrodes (40) which are elevated and overlap shelf portions (21) of an inverse-T gate electrode (19). LDD regions (28) are formed in a substrate (12) and partially underlie the gate electrode. Facets (41) of the selectively deposited source and drain electrodes overlie the shelf portions of the gate electrode, thereby creating uniform doping profiles of heavily doped regions (42).
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