发明名称 PUSH-BACK JUNCTION ISOLATION SEMICONDUCTOR STRUCTURE AND METHOD
摘要 The surface area of a junction-isolated tub in a silicon epitaxial layer grown on a silicon substrate is increased by introducing dopant into surface portions of the tub to effectively push back the junction between the tub and the isolation region. The junction-isolation region surrounding the tub typically has a dopant concentration profile which decreases from the center of the junction-isolation region towards the junction with the tub. By increasing the surface concentration of dopant in the tube, the net dopant concentration of peripheral portions of the junction-isolation region is converted, thereby effectively increasing the size of the surface of the tub. The dopant concentration in the surface of the entire tub can be increased, or only the periphery of the tub can have increased dopant concentration, thereby maintaining the breakdown voltage of devices fabricated in the tub.
申请公布号 US5182219(A) 申请公布日期 1993.01.26
申请号 US19910739791 申请日期 1991.08.01
申请人 LINEAR TECHNOLOGY CORPORATION 发明人 NELSON, CARL;WANG, JIA-TARNG
分类号 H01L21/761 主分类号 H01L21/761
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