MANUFACTURING METHOD OF DOUBLE POLYCIDE GATE CMOS

摘要

A double polycide gate CMOS, which causes interdiffusion between N+ and P+ gates by implanting N type ions in a half of polycide and P type ions in the other half, is manufactured by (A) selectively removing polysilicon (5), which is formed on field oxide (3), from the contact part of N+ and P+ gates by masking and etching, (B) forming gate electrode by sputtering or precipitating silicide (7) on the whole surface, and (C) implanting ions in the source and drain regions of N MOS region (5a) and P MOS region (5b).