| 摘要 |
PURPOSE:To improve the degree of integration of a semiconductor integrated circuit by setting the other electrode of the third transistor and the other electrode of the fourth transistor to the first potential, and setting both the first bit line and the second bit line to the second potential different from the first potential, in data holding condition. CONSTITUTION:The memory cell 30 and 40 of a memory, which constitutes a semiconductor integrated circuit device, is constituted of four n-channel MOS transistors 31-34 or p-channel MOS transistors 41-44. Furthermore, in one data holding condition, the first potential is given with a GND power source and a VDD power source, and the second potential different from the first potential is given with a pair of bit lines (BITNA and BITNNB) or a pair of bit lines (BITPA and BITPB). Hereby, the number of transistors, which constitutes the memory cell, can be reduced, and the area of the memory can be reduced, so the degree of integration of the semiconductor integrated circuit can be improved. |
