发明名称 DATA COMMUNICATION SYSTEM FOR COMPUTER
摘要 PURPOSE:To increase the number of system processors without increasing a data length by permitting data for the external part of a processor combination network in a parallel processing computer system to hold a part of a destination processor number. CONSTITUTION:Plural element processors PE having the communication ports of the four systems of north, south, east and west are matrix-arranged. A program and initial data are loaded from a host computer through a host interface and a network interface NIF. The respective element processors PE execute data communication between the processors in accordance with the program. At that time, data holds an external flag showing whether the processor number of a destination and data are to be outputted to the external part or not. Thus, communication control is executed toward a previously decided specified column in spite of the value of a column number field among the destination processor numbers which data for the external part previously holds. Thus, only the row number of the destination processor PE is designated and therefore communication can be executed.
申请公布号 JPH0512231(A) 申请公布日期 1993.01.22
申请号 JP19910161781 申请日期 1991.07.02
申请人 SANYO ELECTRIC CO LTD 发明人 MIURA HIROKI
分类号 G06F15/16;G06F15/173;G06F15/177;G06F15/80;G06F15/82 主分类号 G06F15/16
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