发明名称 SAMPLING CIRCUIT
摘要 PURPOSE:To obtain a stable sampling data without being affected of a jitter component by providing a dead band with respect to a delay in a reset pulse to a counter operated at a 4-multiple frequency in order to initialize the counter when two consecutive data sampled by the 4-multiple frequency differ from each other. CONSTITUTION:When a jitter component in a transmission data S1 causes a difference as points a, b in figure, a data S1 after subject to change is sampled at the point (a) and the data S1 before change is sampled at the point (a) by using a clock S2 of a 4-multiple frequency. That is, outputs of D F/F 10, 11 for 4-multiple frequency sampling are respectively S4, S5 and the frequency of a reset pulse S6 is deviated with respect to the transmission clock by the sampling. Then the pulse S6 is directly inputted to a NOR circuit 23 to prevent the D F/F14 from being affected by the deviation and an output S7 having a period depending only on the clock S2 is generated.
申请公布号 JPH0514327(A) 申请公布日期 1993.01.22
申请号 JP19910164662 申请日期 1991.07.04
申请人 TOSHIBA CORP 发明人 SUZUKI MITSUO
分类号 H04L7/04;H04L7/00 主分类号 H04L7/04
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