| 摘要 |
<p>PURPOSE:To realize the time division bi-direction digital transmitter capable of reducing jitter in a signal sent to a line. CONSTITUTION:This transmitter is provided with an analog equalization section 1 equalizing an input from a line 101 and sampling the equalized signal based on a clock signal and a transmission/reception section 2 receiving a digital signal from the line 101 via the analog equalization section 1 and sending the digital signal to the line 101. Upon the transmission of the digital signal to the line 101, the transmission/reception section 2 sends the signal while synchronizing the transmission timing of the digital signal with the sampling timing of the analog equalization section 1 and then the digital signal sent to the line 101 is immune to the effect of jitter caused in the transmission/reception section 2.</p> |
