Test state switching on circuit for memory testing - has level detector, Schmitt trigger, flip=flop and latch, and switches output between reference and operating voltage

摘要

The circuit for switching a test state contains a level detector unit (10) for determining the level of an input signal applied to an input connector (1). A Schmitt trigger (20) stabilises the level of the signal detected by the level detector and delivers a stabilsied clock signal (CK,Negated CK). A flip-flop and latching unit (30) outputs a test trigger signal (TEST(EN)) under the control of the clock signal from the Schmitt trigger unit. The level detector outputs a signal with a reference potential when an input signal lies below the reference potential and a supply voltage level signal when the input signal exceeds the reference potential. ADVANTAGE - Enables instantaneous test triggering and application of normal operating signal to input during test mode.