发明名称 MULTI-LOOP SYNTHESIZER
摘要 <p>Briefly, according to the invention, a multi-loop synthesizer (100) for producing an output signal (114) having minimum spurious components is described. The multi-loop synthesizer (100) includes a first synthesizer loop (116) which has a divider stage (108) and an oscillator stage (106) for providing an oscillator output signal (118). The multi-loop synthesizer (100) also includes at least one additional synthesizer loop (121) which also has an output for providing a loop output signal (120). The multi-loop synthesizer (100) further includes an image balanced mixer (110) coupled to the divider stage (108) of the first synthesizer loop for mixing the oscillator output signal (118) of the first synthesizer loop (116) with the loop output (120) of the at least one additional synthesizer loop (121).</p>
申请公布号 WO1993001657(A1) 申请公布日期 1993.01.21
申请号 US1992005578 申请日期 1992.07.02
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