发明名称 CIRCUIT PROTECTION ARRANGEMENT
摘要 <p>An arrangement that is intended to be series connected in a line of an electrical circuit for protecting the circuit from an overcurrent, comprises a depletion mode FET (1) that switches the line current and a control device (4) that is connected across a resistance in the line, preferably the channel resistance of the FET (1), and will bias the gate of the FET (1) in response to the voltage difference across the resistance in order to switch the FET off when the arrangement is subjected to an overcurrent in the line. The arrangement has the advantage that since the FET (1) is normally on, there is no initial voltage drop across the arrangement before it becomes conductive so that the arrangement can be substantially linear.</p>
申请公布号 WO1993001639(A1) 申请公布日期 1993.01.21
申请号 GB1992001237 申请日期 1992.07.08
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