发明名称 SIGNAL PROCESSING DEVICE
摘要 PURPOSE:To reduce a storage area in a memory for a program for processing data which are generated from a plurality of channels, and by eliminating peripheral logic circuits. CONSTITUTION:Upper grade bits on a basic counter 11 designate a channel of data delivered from a CPU while lower grade bits read a program for one channel, stored in a program ROM 12. Accordingly, data from the CPU are processed in accordance with the program stored in the program ROM 12, and are allocated to a channel corresponding to the upper grade bit output from the basic counter 11 is allocated.
申请公布号 JPH056183(A) 申请公布日期 1993.01.14
申请号 JP19910304554 申请日期 1991.11.20
申请人 CASIO COMPUT CO LTD 发明人 HANZAWA KOTARO;SAKATA GORO;TANAKA KIKUJI
分类号 G10H1/18;G10H1/02;G10H7/00;G10H7/02 主分类号 G10H1/18
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