发明名称 DISPLAY CONTROL CIRCUIT
摘要 <p>PURPOSE:To facilitate recognition for human eyes by compressing a performance band over wide width by displaying a logarithm when displaying the operating performance of an operation processor. CONSTITUTION:Each time the operation is executed, an operation processor 1 outputs an operation execution end signal to a signal line 1. A display control circuit receiving this signal counts the number of operations at the operation processor 1 by using an adder 201. A logarithm transformation circuit 24 transforms the coefficient value of a register 21 to the logarithm with '2' as the base. This value transformed to the logarithm is sampled at fine time intervals, the peak value is detected and performance display data are prepared while following up this peak value. Thus, the peak performance can be smoothly displayed on a display 3.</p>
申请公布号 JPH056253(A) 申请公布日期 1993.01.14
申请号 JP19910157319 申请日期 1991.06.28
申请人 NEC CORP 发明人 YAMADA TAKAHIRO
分类号 G06F3/14;G06F3/048;G06T11/20 主分类号 G06F3/14
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