| 摘要 |
<p>PURPOSE:To highly integrate a NAND cell type EEPROM. CONSTITUTION:The drain of a memory cell M1 of memory cells M1-M4 on the side of bit lines BL, is connected directly to a bit line BL without immediately of a selective gate, and a source of the cell M4 is connected to a source line through a selective gate S. In a data write mode, a high potential is applied to a selected word line, an intermediate potential is applied to a nonselected word line in a NAND cell, a ground potential or a power source potential is applied to the selected bit line according to data, and the power source potential is applied to the nonselected bit line.</p> |
