| 摘要 |
<p>PURPOSE:To eliminate difficulty of layout of a high voltage switch and a column switch and to obtain an EEPROM having a page mode writing function and adapted for a high integration. CONSTITUTION:A column switch and a high voltage switch connected to bit lines, are removed, and an address counter 26 and a data latch 27 are newly provided. A data latch 27 is disposed between an I/O buffer 19 and a Y gate 18. At the time of a program cycle, the counter 26 is activated, and transfer gates G1-Gm in the gate 18 are sequentially selected. Thus, a high voltage Vpp or 0V is periodically applied to the bit line in a memory cell array 11 according to write data stored in the latch 27.</p> |
