| 摘要 |
A data scrambler, which transmits a data sequence, includes circuitry to suppress consecutive occurrences of a predetermined number of data sequence bits having the same value. The number of consecutive occurrences of bits having the same value are counted. When the number of consecutive occurrences of bits having the same value reaches a predetermined number, at least one of the bits of the transmitted data sequence is inverted. Complementary circuitry is included in a data descrambler so that the bits that were inverted by the data scrambler can be re-inverted to their original value by the descrambler.
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