| 摘要 |
PURPOSE:To prevent a decrease in the random property of an error by inserting the error into an input digital signal according to the correlation output of the output of scrambling and a PN pattern generator. CONSTITUTION:An (n)th-degree PN pattern generator 24 generates (n) phases of PN patterns with a period of 2<n>-1 with an input clock and supplies them to a correlation detector 25. Further, an (m)th-degree scrambler 27 scrambles an input signal to generate and supply (m) phases of scramble patterns to the correlation detector 25. The correlation detector 25 detects the correlation between the (n) phases of PN patterns and (m) phases of scramble patterns and sends its output to an error inserting circuit 26. The error inserting circuit 26 inverts the polarity of the input signal from a terminal 21 and outputs it only when the correlation output exists to insert the error, and passes the input signal as it is when off. |
