发明名称 FELDEFFEKTTRANSISTOR MIT ISOLIERTEM GATE.
摘要 Extension directions of source electrode layer and a drain electrode are parallel to rows or columns of an array of alternately arranged source regions and drain regions, thereby forming widths of source and drain electrode layers wider than those of a conventional transistor to obtain a large mutual conductance.
申请公布号 DE3782748(D1) 申请公布日期 1993.01.07
申请号 DE19873782748 申请日期 1987.01.21
申请人 KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP;TOSHIBA MICRO-COMPUTER ENGINEERING CORP., KAWASAKI, JP 发明人 KINUGASA, MASANORI C/O PATENT DIVISION;TANAKA, FUMINARI C/O PATENT DIVISION;SHIGEHARA, HIROSHI C/O PATENT DIVISION, MINATO-KU TOKYO 105, JP;OHTA, HIROKATA, YOKOHAMA-SHI, JP
分类号 H01L29/78;H01L23/528;H01L27/118;H01L29/417;H01L29/423;H01L29/94;(IPC1-7):H01L29/52;H01L23/52 主分类号 H01L29/78
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