Apparatus for simultaneous write access to a single bit memory.

摘要

In an apparatus including a first and second processor coupled to a shared bit-RAM memory, simultaneous write operations can be performed without internal race conditions in the memory. Rather than using arbitration, a write pulse is generated by logic in each processor only when data to be written is different from data currently stored in a given location. A processor can write data to the bit-RAM only when a write pulse has been generated by that processor. Clocking signals from the processors are used to insure that a read and a write operation are not performed by two separate processors. <IMAGE>