发明名称 PULSE DELAY CIRCUIT
摘要 PURPOSE:To delay a pulse signal with high resolution. CONSTITUTION:A set value is given to select signal inputs 315 to 320 before a pulse to be delayed is inputted from an input 313. Propagation delay times of one-common input gates 301 and 304, two-common input gates 302 and 305, and three-common input gates 303 and 306 are S, S-a, and S-2a respectively. The difference between the extent of delay for each set value and that for the next set value is always (a), and consequently, the obtained delay resolution is shorter than the propagation delay time of a logical gate.
申请公布号 JPH04371018(A) 申请公布日期 1992.12.24
申请号 JP19910148408 申请日期 1991.06.20
申请人 HITACHI LTD 发明人 ORIHASHI RITSURO
分类号 H03K5/13;H03K5/133 主分类号 H03K5/13
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