发明名称 |
Electrically erasable and programmable semiconductor module - has first conductivity substrate with bounded by side walls and bottom |
摘要 |
The first conductivity substrate (1) has a main surface and a groove (11) bounded by side walls (11d) and a botjtom (11a). On the side wall is a first gate electrode with an intermediate insulating film (9), whose top section has a first thickness, while a lower thickness lower section is deposited on the groove bottom with a second intermediate insulating film. A first doping region (2) of a first conductivity is formed in the substrate main surface, adjacent to the groove side wall and the top section of the gate electrode. A second conductivity doping region (3) is formed adjacent to the lower section of the gate electrode. On the latter is deposited a second gate electrode, also with an intermediate third insulating film (6). USE/ADVANTAGE - For EEPROMs, with facility for avalanche break down adjacent to first insulating layer and tunel effect adjacent to thin insulating layer.
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申请公布号 |
DE4219854(A1) |
申请公布日期 |
1992.12.24 |
申请号 |
DE19924219854 |
申请日期 |
1992.06.17 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP |
发明人 |
WAKE, SETSUO, ITAMI, HYOGO, JP |
分类号 |
H01L21/8247;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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