发明名称 Digital phase lock clock generator without local oscillator
摘要 A digital phase lock loop that does not depend on a voltage controlled oscillator (VCO) for phase locking. A phase detector (PD), terminated with a latch, controls an up/down counter that programs an increase/decrease of delay on the delay line. The tapped output of the delay line goes through a two phase generator which in turn feeds back to the PD for comparison with the reference clock. This process is repeated until phase locking is obtained.
申请公布号 US5173617(A) 申请公布日期 1992.12.22
申请号 US19890391689 申请日期 1989.08.10
申请人 MOTOROLA, INC. 发明人 ALSUP, MITCHELL;DOBBS, CARL S.;WU, YUNG;MOUGHANNI, CLAUDE;HADDAD, ELIE I.
分类号 H03K5/26;H03L7/081;H03L7/089;H04L7/033 主分类号 H03K5/26
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