发明名称 LINE TEST SYSTEM
摘要 PURPOSE:To isolate a fault location of a line and an equipment by comparing the content of a transmission data buffer with the content of a reception data buffer. CONSTITUTION:A test data pattern is in existence in a transmission data buffer 131 on a common share memory 130, and a processor 120 implements a transmission command for a test data pattern to line controllers 200-20n. The data is sent to lines 300-3n3 by the controllers 200-20n and looped back in its own line, and enters the controllers 200-20n as a reception data. The controllers 200-20n stores the reception data to a reception data buffer 132 of a memory 130. The processor 120 compares the test data pattern of the memory 130 with a reception data to test the line and the device. Even when the line test is in operation in on-line, excellent operability is attained efficiently.
申请公布号 JPH04369146(A) 申请公布日期 1992.12.21
申请号 JP19910144499 申请日期 1991.06.17
申请人 HITACHI LTD;HITACHI JOHO NETWORK:KK 发明人 MORIKAWA SHINGO;UGAJIN ATSUSHI
分类号 H04B17/00;H04L29/14 主分类号 H04B17/00
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