| 摘要 |
PURPOSE:To easily handle the double precision multiplication on the maximum scale by handling the lower side N bits of a double precision numerical value being an absolute value format as a complement format of '2' without adjusting a format, and adding '1' to the upper side N bits and correcting them, when the uppermost bit of the lower side N bits is '1'. CONSTITUTION:A multiplier of 24X24 bits used exclusively for a complement format of '2' is used. In such a state, a correction of the upper side 24 bits of a multiplicand of 48 bits is executed by adding '1' in advance to the upper side 40, when an MSB 42 of the lower side 24 bits is '1'. Next, the lower side 24 bits 41 of the multiplicand of 48 bits is handled as a complement format of '2' as it is without adjusting a format, with respect to that which is an absolute value format in reality and a partial product 44 is derived. Subsequently, a partial product 45 is derived, and by aligning a digit with a 24-th bit of the partial product of an LSB of the partial product 45 and adding it, a 72 bit multiplication result 46 is derived. |
